Explain ARM Cortex-M architecture like I am a 5th standard student in Hinglish. Draw and explain the architecture diagram step by step.
Lesson transcript
The full narration of this lesson in EN — read along, or revisit any part.
Seedha jawab: ARM Cortex-M ek family hai chhote processor cores ki — matlab 'dimaag' — jo ARM company design karti hai. ARM sirf design aur rules banati hai; ST, NXP, TI jaise companies us design ke around pura chip banati hain — Flash, RAM, timers, pins sab jodkar. Isliye 'Cortex-M' ek chip ka naam nahi, ek design family ka naam hai.
Do roles alag samjho. ARM: core ka design aur instruction rules deti hai. ST/NXP/TI: us core ke around pura microcontroller chip banate hain — memory, timers, GPIO pins. Isliye ek hi Cortex-M core alag-alag company ke chips mein milta hai, par baaki cheezein alag hoti hain.
Ab core ke andar ke main blocks. Processor core: ALU (ganit) plus registers. NVIC: interrupt controller jo urgent events handle karta hai. SysTick: core ke andar ka chhota timer. Bus interfaces: memory aur devices se baat karne ke raste. Debug unit: ek alag block jo chip ko rok kar andar dekhne deta hai — jaise breakpoint lagana, instruction-by-instruction chalana, registers padhna. Yahi block programmer ko bug dhoondhne deta hai.
Registers ko yaad rakho: R0–R12 general kaam ke registers hain — abhi ke numbers ka notepad. SP (stack pointer) batata hai stack mein agla item kahan rakhna hai. LR (link register) yaad rakhta hai function khatam hone par kahan wapas jaana hai. PC (program counter) agli instruction ki taraf ungli karta hai.
Pipeline samjho — roti line jaisa. Stage 1: fetch — agli instruction memory se laao. Stage 2: decode — samjho ye kya keh rahi hai. Stage 3: execute — kaam karo. Jaise roti line mein ek banda aata belta hai, doosra sekta hai, teesra pack karta hai — teeno ek saath kaam karte hain. Isliye har clock cycle mein ek instruction khatam hoti hai, chahe ek instruction ko teen stages se guzarna padta hai.
Memory map aur buses. Code Flash mein rehta hai, working data SRAM mein, aur peripherals (GPIO, timers) memory-mapped hain — matlab woh bhi addresses ki tarah dikhte hain. Core teen raston se baat karta hai: ICode bus instructions ke liye, DCode bus data ke liye, System bus slow peripherals ke liye. Bus matrix in sab ko jodta hai.
Ab button press ka pura safar. Button dabaya → GPIO peripheral interrupt raise karta hai. NVIC sabse high priority wala interrupt chunta hai, aur interrupt vector table se handler ka address nikalta hai. Core apna context save karta hai — PC, LR, aur zaroori registers stack par. Phir handler address par jump karta hai, handler chalta hai, aur return hone par saved context wapas load hota hai — program wahin se chalta hai jahan chhoda tha.
Ab diagram step by step banate hain. Step 1: core box — processor core + registers. Step 2: NVIC aur SysTick core ke andar jodo. Step 3: debug unit bhi core ke andar. Step 4: bus matrix core ke bahar. Step 5: Flash, SRAM, peripherals bus matrix se jodo. Har arrow par likho kya travel karta hai: ICode par instructions, DCode par data, System bus par peripheral reads/writes.
Yaad rakho: chhota core, registers, teen-stage pipeline, NVIC urgent events ke liye, SysTick time ke liye, debug unit bug dhoondhne ke liye, aur buses jo Flash, SRAM aur peripherals tak le jaate hain. Yahi ARM Cortex-M hai.